Quiz 2

Digital Principles and System Design

Quiz -2

1.      A device used to display one or more digital signals so that they can be compared to expected timing diagrams for the signals is a:

A. DMM B. spectrum analyzer C. logic analyzer D. frequency counter

2.      If a signal passing through a gate is inhibited by sending a LOW into one of the inputs, and the output is HIGH, the gate is a(n):
A. AND B. NAND C. NOR D. OR
3.      If a 3-input AND gate has eight input possibilities, how many of those possibilities will result in a HIGH output?
A. 1 B. 2 C. 7 D. 8
	4.      What does the small bubble on the output of the NAND gate logic symbol mean?
	A. open collector output B. tristate C. The output is inverted. D. none of the above
5.      What are the pin numbers of the outputs of the gates in a 7432 IC?
A. 3, 6, 10, and 13 B. 1, 4, 10, and 13 C. 3, 6, 8, and 11 D. 1, 4, 8, and 11
	6.      One advantage TTL has over CMOS is that TTL is ________.
	A. less expensive B. not sensitive to electrostatic discharge C. faster D. more widely available
	7.      How many input combinations would a truth table have for a six-input AND gate?
	A. 32 B. 48 C. 64 D. 128
	8.      The term "hex inverter" refers to:
	A. an inverter that has six inputs B. six inverters in a single package C. a six-input symbolic logic device D. an inverter that has a history of failure
9.      Converting the Boolean expression LM + M(NO + PQ) to SOP form, we get ________.
A. LM + MNOPQ B. L + MNO + MPQ C. LM + M + NO + MPQ D. LM + MNO + MPQ

10.  Determine the binary values of the variables for which the following standard POS expression is equal to 0.

A. (0 + 1 + 0)(1 + 0 + 1) B. (1 + 1 + 1)(0 + 0 + 0) C. (0 + 0 + 0)(1 + 0 + 1) D. (1 + 1 + 0)(1 + 0 + 0)