Saturday 31 January 2015

ASSIGNMENT -1

Note down the Assignment Questions and find out the answers. Write the Question and Answer in A4 sheet and submit on or before 09.02.2015. without fail.

  1. Realize OR gate using NAND gate.
  2. Convert the (153.513)10 to Octal.
  3. Define the following: minterm and maxterm
  4. State and prove Consensus theorem
  5. Given the two binary numbers X=1010100 and Y=1000011, perform the subtraction                     (a) X-Y and (b) Y-X using 2’s complements 
  6. What is the abbreviation of ASCII and EBCDIC code
  7. State the sequence of operator precedence in Boolean expression?
  8.  What is the advantage of gray codes over the binary number sequence?
  9. Perform 9’s and 10’s compliment subtraction between 18 and -24
  10. Simplify the following Boolean expression to a minimum number of literals:
    A'B' + A'C' D' + A' B' D + A' B' C D'
  11. Simplify the expression ((AB'+ABC)'+A(B+AB'))'
  12. Define the following terms: prime implicant, essential prime implicant 
  13. What is the limitation of Karnaugh map?
  14. Simplify (x+y) (x+y' ) to a minimum number of literals
  15.  Convert (367)10 into Excess - 3 code 
  16. What is the largest binary number that can be expressed with 12 bits? What is the equivalent decimal and hexadecimal?
  17. Find the octal equivalent of hexadecimal number AB.CD
  18. Find the minterm of xy+yz+xy' z 
  19. Simplify the following Boolean function by Karnaugh map method:       F(A, B, C, D) = Σm(1, 5, 9, 12, 13, 15)
  20. Simplify the following Boolean functions to a minimum number of literals 
    (a) (x + y)(x + y′) (b) xy + x′z + yz 




     

Wednesday 28 January 2015

Quiz 2





Digital Principles and System Design

Quiz -2




1.      A device used to display one or more digital signals so that they can be compared to expected timing diagrams for the signals is a:
DMM
spectrum analyzer
logic analyzer
frequency counter


2.      If a signal passing through a gate is inhibited by sending a LOW into one of the inputs, and the output is HIGH, the gate is a(n):
AND
NAND
NOR
OR

3.      If a 3-input AND gate has eight input possibilities, how many of those possibilities will result in a HIGH output?
1
2
7
8


4.      What does the small bubble on the output of the NAND gate logic symbol mean?
open collector output
tristate
The output is inverted.
none of the above

5.      What are the pin numbers of the outputs of the gates in a 7432 IC?
3, 6, 10, and 13
1, 4, 10, and 13
3, 6, 8, and 11
1, 4, 8, and 11


6.      One advantage TTL has over CMOS is that TTL is ________.
less expensive
not sensitive to electrostatic discharge
faster
more widely available


7.      How many input combinations would a truth table have for a six-input AND gate?
32
48
64
128

8.      The term "hex inverter" refers to:
an inverter that has six inputs
six inverters in a single package
a six-input symbolic logic device
an inverter that has a history of failure

9.      Converting the Boolean expression LM + M(NO + PQ) to SOP form, we get ________.
LM + MNOPQ
L + MNO + MPQ
LM + M + NO + MPQ
LM + MNO + MPQ

10.  Determine the binary values of the variables for which the following standard POS expression is equal to 0.
(0 + 1 + 0)(1 + 0 + 1)
(1 + 1 + 1)(0 + 0 + 0)
(0 + 0 + 0)(1 + 0 + 1)
(1 + 1 + 0)(1 + 0 + 0)